A1 Journal article (refereed), original research

I–V curve hysteresis induced by gate-free charging of GaAs nanowires' surface oxide


Publication Details

Authors: Alekseev Prokhor, Geydt Pavel, Dunaevskiy Mikhail, Lähderanta Erkki, Haggrén Tuomas, Kakko Joona-Pekko, Lipsanen Harri

Publisher: AIP Publishing

Publication year: 2017

Language: English

Related journal or series: Applied Physics Letters

Volume number: 111

Issue number: 13

ISSN: 0003-6951

eISSN: 1077-3118

JUFO level of this publication: 2

Digital Object Identifier (DOI): http://dx.doi.org/10.1063/1.5005125

Permanent website address: http://aip.scitation.org/doi/full/10.1063/1.5005125

Open Access: Not an Open Access publication

Research data location: http://aip.scitation.org/doi/suppl/10.1063/1.5005125/suppl_file/supplementary+material+-september7.pdf


Abstract

The control of nanowire-based device performance requires knowledge about the transport of charge carriers and its limiting factors. We present experimental and modeled results of a study of electrical properties of GaAs nanowires (NWs), considering their native oxide cover. Measurements of individual vertical NWs were performed with conductive atomic force microscopy (C-AFM). Experimental C-AFM observations with numerical simulations revealed the complex resistive behavior of NWs. A hysteresis of current–voltage characteristics of the p-doped NWs as-grown on substrates with different types of doping was registered. The emergence of hysteresis was explained by the trapping of majority carriers in the surface oxide layer near the reverse-biased barriers under the source-drain current. It was found that the accumulation of charge increases the current for highly doped p+-NWs on n+-substrate, while for moderately doped p+-NWs on p+-substrate, charge accumulation decreases the current due to blocking of the conductive channel of NWs.


Last updated on 2018-19-10 at 07:55